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Tag Archives: RF

IoT vs. Traditional Embedded for Analog, Low Power and Security

In Part III, technology leaders from STMicro, Atmel, Mouser, Synopsys, Movea, and ARM, define the big challenges in IoT – mixed signal, low power and security.

Will the Internet-of-Things (IoT) bring new analog integration, low power and security challenges to traditional SoC and embedded designs? To answer these questions, System Design Engineering sat down Bernard Kasser, Director Security R&D, Advanced System Technology, STMicroelectronic; Bob Martin, Senior Manager Microcontroller Group Central Applications, Atmel; Kevin Parmenter, Director of Technical Resources, Mouser; Steve Smith, Senior Director of Marketing, AMS Group, Synopsys; Cyrille Soubeyrat, VP of Engineering at Movea; and Diya Soubra, CPU Product Marketing Manager, ARM. What follows are excerpts from that discussion. – JB

Best Practices for Mixed Signal, RF and Microcontroller IoT

The Low-Power Engineering (LPE) portal asked the experts for help in detailing the best practices to help digital designers incorporate analog, mixed signal and RF functionality into their System-on-Chips (SoC). What follows is a compendium of inputs from Diya Soubra, CPU Product Manager, Processor Division and Joseph Yiu, Embedded Technology Specialist at ARM; Qi Wang,Technical Marketing Group Director and Mladen Nizic, Engineering Director for Mixed Signal Solutions at Cadence Design Systems.

Blyler: What are the best practices for EDA chip-level IoT mixed signal and microcontroller designs?

Joseph Yiu:
- Use of power aware verification early and throughout in the project, e.g., power aware simulation with Si2 Common Power Format (CPF) (and/or IEEE-Accellera Unified Power Format (UPF)). Power aware verification is not just for low power simulations but also for various system level simulations.
- Use the right model for mixed signal simulation (trade off between accuracy and simulation speed)
- Power quality check. Verification of power constraints/budgets in the early stage of the design can help you to find corner cases in power management schemes.

Read the complete post  on the Low Power Engineering site.